Graphene Nano Ribbon Field-Effect Transistor Based Floating Point Multiplier Topology for Low Power Application

DOI

https://www.doi.org/10.59256/ijrtmr.20260603035

Published In

Volume 6, Issue 3 (2026)

Published Online

May-June 2026

Pages

307-316

Article Type

Original Article

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Biomedical engineering has been influenced by advances in digital signal processing based on VLSI. Because power-efficient processors are required in the detection and processing of weak analog signals from human biological systems. As a result of their popularity in signal analysis, image processing, brain computing, multimedia processing, and machine learning, arithmetic building blocks, specifically multipliers, provide the basic support for computation in most applications. The design and VLSI realization of various multiplier designs capable of performing fixed-point. As well as floating-point operations using Graphene Nanoribbon Field-Effect Transistor technology is the primary focus of the study. Graphene Nanoribbon Field Effect Transistors have been found to have much superior characteristics compared to the existing standard silicon technology-based devices. These include lower leakage power, faster switching times, and better scalability. Optimizations are carried out in the multiplier and memory-associated structures, as the power consumption in signal processing processors for the most part comes from the computing components. Performance characteristics such as power consumption, delay, and power efficiency are calculated by comparison between different multipliers. To simulate the proposed designs, Synopsys HSPICE predictive modelling at the 32 nm process node is used.